View DG411_337970.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

DG411, DG412, DG413
Data Sheet June 1999 File Number
3282.5
Monolithic Quad SPST, CMOS Analog Switches
The DG411 series monolithic CMOS analog switches are drop-in replacements for the popular DG211 and DG212 series devices. They include four independent single pole throw (SPST) analog switches, and TTL and CMOS compatible digital inputs. These switches feature lower analog ON resistance (<35) and faster switch time (tON < 175ns) compared to the DG211 or DG212. Charge injection has been reduced, simplifying sample and hold applications. The improvements in the DG411 series are made possible by using a high voltage silicon-gate process. An epitaxial layer prevents the latch-up associated with older CMOS technologies. The 44V maximum voltage range permits controlling 40VP-P signals. Power supplies may be single-ended from +5V to +34V, or split from 5V to 20V. The four switches are bilateral, equally matched for AC or bidirectional signals. The ON resistance variation with analog signals is quite low over a 15V analog input range. The switches in the DG411 and DG412 are identical, differing only in the polarity of the selection logic. Two of the switches in the DG413 (#1 and #4) use the logic of the DG211 and DG411 (i.e., a logic "0" turns the switch ON) and the other two switches use DG212 and DG412 positive logic. This permits independent control of turn-on and turn-off times for SPDT configurations, permitting "break-beforemake" or "make-before-break" operation with a minimum of external logic.
TRUTH TABLE DG411 LOGIC 0 1 NOTE: DG412 SWITCH 1, 4 OFF ON DG413 SWITCH 2, 3 ON OFF
Features
* ON Resistance (Max) . . . . . . . . . . . . . . . . . . . . . . . . . 35 * Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . <35W * Fast Switching Action - tON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175ns - tOFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145ns * Low Charge Injection * Upgrade from DG211/DG212 * TTL, CMOS Compatible * Single or Split Supply Operation
Applications
* Audio Switching * Battery Operated Systems * Data Acquisition * Hi-Rel Systems * Sample and Hold Circuits * Communication Systems * Automatic Test Equipment
Pinout
DG411, DG412, DG413 (PDIP, SOIC) TOP VIEW
IN1 1 D1 2 S1 3 V- 4 GND 5 16 IN2 15 D2 14 S2 13 V+ 12 VL 11 S3 10 D3 9 IN3
SWITCH SWITCH ON OFF OFF ON
S4 6 D4 7 IN4 8
Logic "0" 0.8V. Logic "1" 2.4V.
Ordering Information
PART NUMBER DG411DJ DG411DY DG412DJ DG412DY DG413DJ DG413DY TEMP. RANGE (oC) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 16 Ld PDIP 16 Ld SOIC 16 Ld PDIP 16 Ld SOIC 16 Ld PDIP 16 Ld SOIC PKG. NO. E16.3 M16.15 E16.3 M16.15 E16.3 M16.15
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
DG411, DG412, DG413 Functional Diagrams
IN1 D1 S2 IN2 D2 S3 IN3 D3 S4 IN4 D4 IN4 D4 IN3 D3 S4 IN4 D4 IN2 D2 S3 IN3 D3 S4
Four SPST Switches per Package Switches Shown for Logic "1" Input
DG411 S1 IN1 D1 S2 IN2 D2 S3 DG412 S1 IN1 D1 S2 DG413 S1
Schematic Diagram
V+
(1 Channel)
S
VVL
V+ INX D
GND V-
Pin Descriptions
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 SYMBOL IN1 D1 S1 VGND S4 D4 IN4 IN3 D3 S3 VL V+ S2 D2 IN2 DESCRIPTION Logic Control for Switch 1. Drain (Output) Terminal for Switch 1. Source (Input) Terminal for Switch 1. Negative Power Supply Terminal. Ground Terminal (Logic Common). Source (Input) Terminal for Switch 4. Drain (Output) Terminal for Switch 4. Logic Control for Switch 4. Logic Control for Switch 3. Drain (Output) Terminal for Switch 3. Source (Input) Terminal for Switch 3. Logic Reference Voltage. Positive Power Supply Terminal (Substrate). Source (Input) Terminal for Switch 2. Drain (Output) Terminal for Switch 2. Logic Control for Switch 2.
2
DG411, DG412, DG413
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) to (V+) +0.3V Digital Inputs, VS , VD (Note 1). . . . . (V-) -2V to (V+) + 2V or 30mA, Whichever Occurs First Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . 100mA
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Maximum Junction Temperature (Plastic Packages) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V (Max) Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V (Max) Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (Min) Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Signals on SX , DX , or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Test Conditions: V+ = +15V, V- = -15V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) (NOTE 4) (NOTE 5) (NOTE 4) MIN TYP MAX UNITS
PARAMETER DYNAMIC CHARACTERISTICS Turn-ON Time, tON
RL = 300, CL = 35pF, VS = 10V (Figure 1)
25 85
-
110 100 25 5 68 -85 9 9 35
175 220 145 160 -
ns ns ns ns ns pC dB dB pF pF pF
Turn-OFF Time, tOFF
25 85
Break-Before-Make Time Delay Charge Injection, Q (Figure 3) OFF Isolation (Figure 5) Crosstalk (Channel-to-Channel), (Figure 4) Source OFF Capacitance, CS(OFF) Drain OFF Capacitance, CD(OFF) Channel ON Capacitance, CD(ON) + CS(ON) DIGITAL INPUT CHARACTERISTICS Input Current VIN Low, IIL Input Current VIN High, IIH
DG413 Only, RL = 300, CL = 35pF (Figure 2) CL = 10nF, VG = 0V, RG = 0 RL = 50, CL = 5pF, f = 1MHz
25 25 25 25
f = 1MHz (Figure 6)
25 25 25
VIN Under Test = 0.8V, All Others = 2.4V VIN Under Test = 2.4V, All Others = 0.8V
Full Full
-0.5 -0.5
0.005 0.005
0.5 0.5
A A
ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, rDS(ON) IS = IS = 10mA 10mA, VD = 8.5V, V+ = 13.5V, V- = -13.5V Full 25 Full -15 25 15 35 45 V
3
DG411, DG412, DG413
Electrical Specifications
Test Conditions: V+ = +15V, V- = -15V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified (Continued) TEST CONDITIONS V+ = 16.5V, V- = -16.5V, VD = 15.5V, VS = 15.5V TEMP (oC) 25 Full 25 Full Channel ON Leakage Current, ID(ON) + IS(ON) V+ = 16.5V, V- = -16.5V, VS = VD = 15.5V 25 Full (NOTE 4) (NOTE 5) (NOTE 4) MIN TYP MAX -0.25 -5 -0.25 -5 -0.4 -10 0.1 0.1 0.1 0.25 +5 0.25 +5 0.4 +10 UNITS nA nA nA nA nA nA
PARAMETER Source OFF Leakage Current, IS(OFF) Drain OFF Leakage Current, ID(OFF)
POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V 25 85 Negative Supply Current, I25 85 Logic Supply Current, IL 25 85 Ground Current, IGND 25 85 -1 -5 -1 -5 0.0001 -0.0001 0.0001 -0.0001 1 5 1 5 A A A A A A A A
Electrical Specifications
(Single Supply) Test Conditions: V+ = +12V, V- = 0V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (oC) (NOTE 4) MIN (NOTE 5) TYP (NOTE 4) MAX UNITS
PARAMETER DYNAMIC CHARACTERISTICS Turn-ON Time, tON
RL = 300, CL = 35pF, VS = 8V, (Figure 1)
25 85 25 85
-
175 95 25 25
250 315 125 140 -
ns ns ns ns ns pC
Turn-OFF Time, tOFF
Break-Before-Make Time Delay Charge Injection, Q
DG413 Only, RL = 300, CL = 35pF, VS = 8V CL = 10nF, VG = 6.0V, RG = 0
25 25
ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, rDS(ON) IS = -10mA, VD = 3V, 8V V+ = 10.8V Full 25 Full 0 40 12 80 100 V
4
DG411, DG412, DG413
Electrical Specifications
(Single Supply) Test Conditions: V+ = +12V, V- = 0V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified (Continued) TEST CONDITIONS TEMP (oC) (NOTE 4) MIN (NOTE 5) TYP (NOTE 4) MAX UNITS
PARAMETER POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+
V+ = 13.2V, V- = 0V VIN = 0V or 5V
25 85 25 85
-
0.0001 -
1 5 1 5 -
A A A A A A A A
Negative Supply Current, I-
-1 -5 -1 -5
-0.0001 0.0001 -0.0001 -
Logic Supply Current, IL
25 85
Ground Current, IGND
25 85
NOTES: 3. VIN = input voltage to perform proper function. 4. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 5. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Test Circuits and Waveforms
VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform.
3V LOGIC INPUT 50% 0V tOFF SWITCH INPUT VS VO SWITCH OUTPUT 0V tON 90% 90% tr < 20ns tf < 20ns SWITCH INPUT S1 IN1 LOGIC INPUT GND RL V-15V CL +5V VL V+ D1 +15V SWITCH OUTPUT VO
NOTE: Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENTS POINTS
Repeat test for all IN and S. For load conditions, see Specifications. CL includes fixture and stray RL capacitance. V O = V S ----------------------------------R L + r DS ( ON ) FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
3V LOGIC INPUT VL 0V VS1 90% VS2 = 10V 0V VS2 90% SWITCH OUTPUT VO2 0V tD tD IN1 , IN2 LOGIC INPUT GND S1 VS1 = 10V S2 +5V V+ +15V D1 D2 RL2 300 VO2 RL1 300 VO1 CL1 35pF
SWITCH OUTPUT (V01)
CL2 35pF
V-15V
CL includes fixture and stray capacitance.
FIGURE 2A. MEASUREMENT POINTS FIGURE 2. BREAK-BEFORE-MAKE TIME
FIGURE 2B. TEST CIRCUITS
5
DG411, DG412, DG413 Test Circuits and Waveforms
(Continued)
V+ RG D1 VO
SWITCH OUTPUT
VO
INX VG VVIN = 3V CL
OFF
ON
OFF
OFF GND INX
ON Q = VO x CL
OFF
NOTE: INX dependent on switch configuration, input polarity determined by sense of switch. FIGURE 3A. TEST CIRCUIT FIGURE 3. CHARGE INJECTION FIGURE 3B. MEASUREMENT POINTS
C SIGNAL GENERATOR
V+
+15V C 50 SIGNAL GENERATOR V+
+15V
0dBm
VS
VD
0dBm
VS
0V, 2.4V
IN1
IN2
0V, 2.4V
INX
0V, 2.4V
ANALYZER RL
VD C GND V-15V
NC
ANALYZER RL
VD C
GND
V-15V
FIGURE 4. CROSSTALK TEST CIRCUIT
+15V C V+
FIGURE 5. OFF ISOLATION TEST CIRCUIT
VS INX IMPEDANCE ANALYZER VD f = 1MHz GND V-15V C 0V, 2.4V
FIGURE 6. SOURCE/DRAIN CAPACITANCES TEST CIRCUIT
6
DG411, DG412, DG413 Application Information
Single Supply Operation
The DG411, DG412, DG413 can be operated with unipolar supplies from 5V to 44V. These devices are characterized and tested for single supply operation at 12V to facilitate the majority of applications. To function properly, 12V is tied to Pins 13 and 0V is tied to Pin 4. Pin 12 still requires 5V for TTL compatible switching.
Summing Amplifier
When driving a high impedance, high capacitance load such as shown in Figure 7, where the inputs to the summing amplifier have some noise filtering, it is necessary to have shunt switches for rapid discharge of the filter capacitor, thus preventing offsets from occurring at the output.
R1 VIN1
R2
C1 R5
R3 VIN2
R4 VOUT + R6 C2
DG413
FIGURE 7. SUMMING AMPLIFIER
7
DG411, DG412, DG413 Typical Performance Curves
50 45 40 35 rDS(ON) () 30 25 20 15 10 5 0 -20 -15 -10 -5 0 5 10 30 TA = 25oC 15 20 DRAIN VOLTAGE (V) 0 -55 A: B: C: D: E: F: 5V 8V 10V 12V 15V 20V 240 A 210 180 tON , tOFF (ns) B C D E F 150 120 90 60 tON tOFF V+ = 15V, V- = -15V VL = 5V, VS = 10V
-35
-15
5
25
45
65
85
105
125
TEMPERATURE (oC)
FIGURE 8. ON RESISTANCE vs VD AND POWER SUPPLY VOLTAGE
FIGURE 9. SWITCHING TIME vs TEMPERATURE
40 30 20 10 IS , ID (pA) 0 -10 -20 -30 -40 ID(OFF) ISUPPLY IS(OFF) ID(ON) + IS(ON) V+ = 15V, V- = -15V VL = 5V, TA = 25oC
100mA 10mA 1mA 100A 4SW 10A IL 1A 100nA 4SW V+ = 15V, V- = -15V VL = 5V
I+, I-
-50 -60 -15 -10 -5 0 VS, VD (V) 5 10 15 10nA 10
1SW 100
1SW 1K 10K 100K 1M 10M
FREQUENCY (Hz)
FIGURE 10. LEAKAGE CURRENTS vs ANALOG VOLTAGE
FIGURE 11. SUPPLY CURRENT vs INPUT SWITCHING FREQUENCY
100 80 60 V+ = 15V, V- = -15V VL = 5V
140 120 100 80 CL = 1nF V+ = 15V, V- = -15V VL = 5V CL = 10nF
40 Q (pC) Q (pC) CL = 10nF 20 0 -20 -40 -60 -15 -10 -5 0 VS (V) 5 10 15 CL = 1nF
60 40 20 0 -20 -40 -60 -15 -10 -5 0 VD (V) 5 10 15
FIGURE 12. CHARGE INJECTION vs SOURCE VOLTAGE
FIGURE 13. CHARGE INJECTION vs DRAIN VOLTAGE
8
DG411, DG412, DG413 Die Characteristics
DIE DIMENSIONS: 2760m x 1780m x 485m METALLIZATION: Type: SiAl Thickness: 12kA 1kA PASSIVATION: Type: Nitride Thickness: 8kA 1kA WORST CASE CURRENT DENSITY: 1.5 x 105 A/cm2
Metallization Mask Layout
DG411, DG412, DG413
D1 (2)
IN1 (1)
IN2 (16) (15) D2
S1 (3)
(14) S2
V- (4)
(13) V+ SUBSTRATE
GND (5)
(12) VL
S4 (6)
(11) S3
(7) D4
(8) IN4
(9) IN3
(10) D3
9
DG411, DG412, DG413 Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 12 3 N/2
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
-B-
MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93
MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240
MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280
A
E A2 L A C L
-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1
A1 A2
-C-
B B1 C D D1 E
eA eC
C
e
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E1 e eA eB L N
0.100 BSC 0.300 BSC 0.115 16 0.430 0.150
2.54 BSC 7.62 BSC 2.93 16 10.92 3.81
10
DG411, DG412, DG413 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M16.15 (JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 9.80 3.80 MAX 1.75 0.25 0.51 0.25 10.00 4.00 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0532 0.0040 0.013 0.0075 0.3859 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.3937 0.1574
A1 B C D
A1 0.10(0.004) C
E e H h L N
e
B 0.25(0.010) M C AM BS
0.050 BSC 0.2284 0.0099 0.016 16 0o 8o 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 16 0o 6.20 0.50 1.27
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
11

▲Up To Search▲

Price & Availability of DG411

	To Download DG411 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .